Implementation of a Two-Channel Maximally Decimated Filter Bank using Switched Capacitor Circuits
Por:
Náhlík J., Hospodka J., Sovka P., Psenicka, B
Publicada:
1 abr 2013
Categoría:
Electrical and Electronic Engineering
Resumen:
The aim of this paper is to describe the implementation of a two-channel
filter bank (FB) using the switched capacitor (SC) technique considering
real properties of operational amplifiers (OpAmps). The design procedure
is presented and key recommendations for the implementation are given.
The implementation procedure describes the design of two-channel filter
bank using an IIR Cauer filter, conversion of IIR into the SC filters
and the final implementation of the SC filters. The whole design and an
SC circuit implementation is performed by a PraCAn package in Maple. To
verify the whole filter bank, resulting real property circuit structures
are completely simulated by WinSpice and ELDO simulators. The results
confirm that perfect reconstruction conditions can be almost accepted
for the filter bank implemented by the SC circuits. The phase response
of the SC filter bank is not strictly linear due to the IIR filters.
However, the final ripple of a magnitude frequency response in the
passband is almost constant, app. 0.5 dB for a real circuit analysis.
Filiaciones:
Náhlík J.:
Department of Circuit Theory, CTU FEL, Technická 2, 166 27 Prague, Czech Republic
Hospodka J.:
Department of Circuit Theory, CTU FEL, Technická 2, 166 27 Prague, Czech Republic
Sovka P.:
Department of Circuit Theory, CTU FEL, Technická 2, 166 27 Prague, Czech Republic
Psenicka, B:
Univ Nacl Autonoma Mexico, Dept Telecommun, Mexico City 3000, DF, Mexico
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